The present invention relates to semiconductor memory devices, and more particularly, to a system for programming core cells in a memory device.
Semiconductor devices, such as memory devices, are commonly used as information storage devices in digital systems. As the amount of information that needs to be stored increases, it has become increasingly important to have an efficient way of accessing such memory devices.
Generally, memory read or write operations are initiated in response to external signals provided to the memory by a controller, such as a processor. In most cases, the amount of information that needs to be transferred during a memory access is large. In addition, the rate at which the information is propagated from a processor to a memory device and vice versa continues to increase. Therefore, increasing performance demands are being placed on the ability to read and write information to memory devices.
In a Flash memory, there are many requirements for programming, erasing and otherwise operating the memory cells. As the technology has progressed, a new requirement has emerged. This new requirement is to prevent the over programming of the memory cells. As a result, when over-programming is avoided, it is possible to get a tight voltage threshold (Vth) distribution.
Conventional methods for programming core cells of a Flash memory device use constant-programming and verification conditions. Using this technique, however, makes over-programming highly likely. This is true because when the core cell is almost programmed to the desired Vth level, the next programming pulse is applied, which then over-programs the core cell.
FIG. 1 shows a graph 100 illustrating how conventional methods result in over-programming of core cells in a Flash memory device. At programming (PGM) pulse N the core cell is almost programmed to have a Vth level representative of a data bit xe2x80x9c0xe2x80x9d, indicated at 102. Another programming pulse (N+1) is provided to reach the xe2x80x9c0xe2x80x9d verify level. Unfortunately, this program pulse results in an over-programmed condition as shown at 104.
Therefore, it would be desirable to have a way to program core cells in a memory device without over-programming.
The present invention includes a system to program core cells in a memory device without resulting in an over-programmed condition. As a result of the operation of the invention, it is possible to obtain a very tight Vth distribution for core memory cells without over-programming them.
In one embodiment of the present invention, a method is provided for programming a voltage threshold (Vt) level of a core cell in a memory device. The method comprises steps of determining a desired Vt for the core cell, programming a portion of the Vt of the core cell using a selected programming strength, verifying that the portion of the Vt is successfully programmed, adjusting the selected programming strength, and repeating the step of programming, verifying, and adjusting until the Vt of the core cell is substantially equal to the desired Vt.